flabbergast
/
chibios-projects
1
0
Fork 0
Code Issues Pull Requests Releases Wiki Activity

New hardfault.c. Openocd confs.

Browse Source
master
flabbergast 7 years ago
parent 9bca0acaec
commit ea41b05aeb
4 changed files with 76 additions and 87 deletions
Show Stats Download Patch File Download Diff File

16
openocd/f072-cmsis-dap.cfg
Unescape View File

@ -0,0 +1,16 @@
# adapter/interface
source [find interface/cmsis-dap.cfg]
transport select swd
# increase working area to 6KB
set WORKAREASIZE 0x4000
# reset_config none separate
set CHIPNAME STM32F072CBT6
source [find target/stm32f0x.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Halting Target"
reset init
}

15
openocd/l0-cmsis-dap.cfg
Unescape View File

@ -0,0 +1,15 @@
# adapter/interface
source [find interface/cmsis-dap.cfg]
transport select swd
set WORKAREASIZE 0x2000
# reset_config none separate
set CHIPNAME STM32L052C8
source [find target/stm32l0.cfg]
$_TARGETNAME configure -event gdb-attach {
echo "Halting Target"
reset init
}

8
projects/bat-board-test/mcuconf.h
Unescape View File

@ -40,15 +40,15 @@
#define STM32_VOS STM32_VOS_1P8
#define STM32_PVD_ENABLE FALSE
#define STM32_PLS STM32_PLS_LEV0
#define STM32_HSI16_ENABLED TRUE
#define STM32_HSI16_ENABLED FALSE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED FALSE
#define STM32_HSE_ENABLED TRUE
#define STM32_LSE_ENABLED FALSE
#define STM32_ADC_CLOCK_ENABLED TRUE
#define STM32_ADC_CLOCK_ENABLED FALSE
#define STM32_USB_CLOCK_ENABLED TRUE
#define STM32_MSIRANGE STM32_MSIRANGE_2M
#define STM32_SW STM32_SW_PLL
#define STM32_PLLSRC STM32_PLLSRC_HSI16
#define STM32_PLLSRC STM32_PLLSRC_HSE
#define STM32_PLLMUL_VALUE 4
#define STM32_PLLDIV_VALUE 2
#define STM32_HPRE STM32_HPRE_DIV1

124
projects/testing/hardfault.c
Unescape View File

@ -1,86 +1,44 @@
#include <string.h>
#include <ch.h>
/**
* HardFault_HandlerAsm:
* Alternative Hard Fault handler to help debug the reason for a fault.
* To use, edit the vector table to reference this function in the HardFault vector
* This code is suitable for Cortex-M3 and Cortex-M0 cores
* Executes the BKPT instruction that causes the debugger to stop.
* If no debugger is attached, this will be ignored
*/
// Use the 'naked' attribute so that C stacking is not used.
__attribute__((naked))
void HardFault_Handler(void){
/*
* Get the appropriate stack pointer, depending on our mode,
* and use it as the parameter to the C handler. This function
* will never return
*/
__asm( ".syntax unified\n"
"MOVS R0, #4 \n"
"MOV R1, LR \n"
"TST R0, R1 \n"
"BEQ _MSP \n"
"MRS R0, PSP \n"
"B HardFault_HandlerC \n"
"_MSP: \n"
"MRS R0, MSP \n"
"B HardFault_HandlerC \n"
".syntax divided\n") ;
}
/**
* HardFaultHandler_C:
* This is called from the HardFault_HandlerAsm with a pointer the Fault stack
* as the parameter. We can then read the values from the stack and place them
* into local variables for ease of reading.
* We then read the various Fault Status and Address Registers to help decode
* cause of the fault.
* The function ends with a BKPT instruction to force control back into the debugger
*/
void HardFault_HandlerC(unsigned long *hardfault_args){
volatile unsigned long stacked_r0 ;
volatile unsigned long stacked_r1 ;
volatile unsigned long stacked_r2 ;
volatile unsigned long stacked_r3 ;
volatile unsigned long stacked_r12 ;
volatile unsigned long stacked_lr ;
volatile unsigned long stacked_pc ;
volatile unsigned long stacked_psr ;
volatile unsigned long _CFSR ;
volatile unsigned long _HFSR ;
volatile unsigned long _DFSR ;
volatile unsigned long _AFSR ;
volatile unsigned long _BFAR ;
volatile unsigned long _MMAR ;
stacked_r0 = ((unsigned long)hardfault_args[0]) ;
stacked_r1 = ((unsigned long)hardfault_args[1]) ;
stacked_r2 = ((unsigned long)hardfault_args[2]) ;
stacked_r3 = ((unsigned long)hardfault_args[3]) ;
stacked_r12 = ((unsigned long)hardfault_args[4]) ;
stacked_lr = ((unsigned long)hardfault_args[5]) ;
stacked_pc = ((unsigned long)hardfault_args[6]) ;
stacked_psr = ((unsigned long)hardfault_args[7]) ;
// Configurable Fault Status Register
// Consists of MMSR, BFSR and UFSR
_CFSR = (*((volatile unsigned long *)(0xE000ED28))) ;
// Hard Fault Status Register
_HFSR = (*((volatile unsigned long *)(0xE000ED2C))) ;
// Debug Fault Status Register
_DFSR = (*((volatile unsigned long *)(0xE000ED30))) ;
// Auxiliary Fault Status Register
_AFSR = (*((volatile unsigned long *)(0xE000ED3C))) ;
// Read the Fault Address Registers. These may not contain valid values.
// Check BFARVALID/MMARVALID to see if they are valid values
// MemManage Fault Address Register
_MMAR = (*((volatile unsigned long *)(0xE000ED34))) ;
// Bus Fault Address Register
_BFAR = (*((volatile unsigned long *)(0xE000ED38))) ;
__asm("BKPT #0\n") ; // Break into the debugger
#define bkpt() __asm volatile("BKPT #0\n")
void HardFault_Handler(void) {
//Copy to local variables (not pointers) to allow GDB "i loc" to directly show the info
struct port_extctx ctx;
volatile unsigned long _CFSR ;
volatile unsigned long _HFSR ;
volatile unsigned long _DFSR ;
volatile unsigned long _AFSR ;
volatile unsigned long _BFAR ;
volatile unsigned long _MMAR ;
//Get thread context. Contains main registers including PC and LR
memcpy(&ctx, (void*)__get_PSP(), sizeof(struct port_extctx));
(void)ctx;
// Configurable Fault Status Register
// Consists of MMSR, BFSR and UFSR
_CFSR = (*((volatile unsigned long *)(0xE000ED28))) ;
// Hard Fault Status Register
_HFSR = (*((volatile unsigned long *)(0xE000ED2C))) ;
// Debug Fault Status Register
_DFSR = (*((volatile unsigned long *)(0xE000ED30))) ;
// Auxiliary Fault Status Register
_AFSR = (*((volatile unsigned long *)(0xE000ED3C))) ;
// Read the Fault Address Registers. These may not contain valid values.
// Check BFARVALID/MMARVALID to see if they are valid values
// MemManage Fault Address Register
_MMAR = (*((volatile unsigned long *)(0xE000ED34))) ;
// Bus Fault Address Register
_BFAR = (*((volatile unsigned long *)(0xE000ED38))) ;
//Cause debugger to stop. Ignored if no debugger is attached
bkpt();
NVIC_SystemReset(); // If no debugger connected, just reset the board
}

Write Preview
Loading…
Cancel
Save