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across |
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stellaris |
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msp430/mecrisp |
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\ base definitions for STM32F042 (STRIPPED-DOWN version for USB driver use!) |
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\ adapted from jcw's embello for STM32F103 |
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\ adapted from mecrisp-stellaris 2.2.1a (GPL3) |
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: chipid ( -- u1 u2 u3 3 ) \ unique chip ID as N values on the stack |
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$1FFFF7AC @ $1FFFF7B0 @ $1FFFF7B4 @ 3 ; |
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: hwid ( -- u ) \ a "fairly unique" hardware ID as single 32-bit int |
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chipid 1 do xor loop ; |
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: flash-kb ( -- u ) \ return size of flash memory in KB |
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$1FFFF7CC h@ ; |
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: flash-pagesize ( addr - u ) \ return size of flash page at given address |
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drop 1024 ; |
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: bit ( u -- u ) \ turn a bit position into a single-bit mask |
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1 swap lshift 1-foldable ; |
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$40021000 constant RCC |
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RCC $00 + constant RCC-CR |
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RCC $04 + constant RCC-CFGR |
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RCC $14 + constant RCC-AHBENR |
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RCC $18 + constant RCC-APB2ENR |
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RCC $1C + constant RCC-APB1ENR |
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RCC $30 + constant RCC-CFGR3 |
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RCC $34 + constant RCC-CR2 |
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$40022000 constant FLASH |
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FLASH $0 + constant FLASH-ACR |
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$40006C00 constant CRS |
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CRS $00 + constant CRS-CR |
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CRS $04 + constant CRS-CFGR |
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: 48MHz-after-reset ( -- ) \ set the main clock to 48MHz (HSI->PLL) assuming we're out of RESET |
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%10001 flash-acr bis! |
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%1010 18 lshift rcc-cfgr ! |
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24 bit rcc-cr bis! |
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begin 25 bit rcc-cr bit@ until |
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%10 rcc-cfgr bis! |
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$1a1 $4000440C ! \ change USART2_BRR to match 48MHz |
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; |
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: usb-clk ( -- ) \ enable HSI48, autotrim and set USB clock source |
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16 bit RCC-CR2 bis! \ switch on HSI48 |
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begin 17 bit RCC-CR2 bit@ until \ wait for HSI48RDY |
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27 bit RCC-APB1ENR bis! \ enable CRS |
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CRS-CFGR @ %11 28 lshift bic \ prepare setting SYNCSRC |
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%10 28 lshift or CRS-CFGR ! \ set USB SOF, write back |
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6 bit 5 bit or CRS-CR bis! \ set AUTOTRIMEN and CEN |
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\ will only start actually working after we start getting SOF |
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7 bit RCC-CFGR3 bic! \ HSI48 is USB clock source |
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; |
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\ emulate c, which is not available in hardware on some chips. |
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\ copied from Mecrisp's common/charcomma.txt |
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0 variable c,collection |
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: c, ( c -- ) \ emulate c, with h, |
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c,collection @ ?dup if $FF and swap 8 lshift or h, |
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0 c,collection ! |
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else $100 or c,collection ! then ; |
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: calign ( -- ) \ must be called to flush after odd number of c, calls |
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c,collection @ if 0 c, then ; |
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: cornerstone ( "name" -- ) \ define a flash memory cornerstone |
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<builds begin here dup flash-pagesize 1- and while 0 h, repeat |
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does> begin dup dup flash-pagesize 1- and while 2+ repeat cr |
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eraseflashfrom ; |
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@ -0,0 +1,24 @@ |
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\ USB console for the bat board with F072 |
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\ modelled after Jean-Claude Wippler's USB console for F103 boards |
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\ in embello: https://git.jeelabs.org/jcw/embello |
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$4000 eraseflashfrom \ this must be loaded on top of a *clean* Mecrisp image! (*non* RA) |
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cr |
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compiletoflash |
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include hal-stm32f04.fs |
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include ../flib/any/ring.fs |
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include usb.fs |
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: init ( -- ) |
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\ with the 'spezial' mecrisp base, mecrisp's init doesn't run so... |
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%111 17 lshift RCC-AHBENR bis! \ enable GPIO ABC |
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48MHz-after-reset \ go to 48MHz |
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0 bit RCC-APB2ENR bis! \ enable SYSCFG clock |
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4 bit $40010000 bis! \ PA11_PA12_RMP in SYSCFG-CFGR1 (remap pa11,12->pa9,10) |
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usb-clk \ prepare HSI48 clock and CRS |
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usb-io \ switch on USB console |
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; |
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( usb end: ) here hex. |
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cornerstone eraseflash |
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