Add top-of-file comments.

01-blink/main.s

@@ -1,10 +1,12 @@
 #
-# 01-blink.s
-# (c) 2021 flabbergast <flabbergast@drak.xyz>
+# main.s
+#
+# 2021 flabbergast <flabbergast@drak.xyz>
 # Unlicense: https://unlicense.org/
 # 
 
 .option norelax
+.equ compressed_isa, 1
 
 # -----------------------------------------------------------------------------
 # Code begins here

01-blink/p_delay.s

@@ -1,4 +1,14 @@
-.align 2
+#
+# p_delay.s: functions for waiting
+#
+# 2021 flabbergast@drak.xyz
+# Unlicense: https://unlicense.org/
+#
+.if compressed_isa
+.balign 2, 0
+.else
+.balign 4, 0
+.endif
 
 .include "platform_regs.inc"
 .equ MTIME_FREQUENCY, 33        # 32_768 Hz clock

02-chase/main.s

@@ -1,10 +1,12 @@
 #
+# main.s
 #
 # 2021 flabbergast <flabbergast@drak.xyz>
 # Unlicense: https://unlicense.org/
 # 
 
 .option norelax
+.equ compressed_isa, 1
 
 # -----------------------------------------------------------------------------
 # Code begins here

02-chase/p_delay.s

@@ -1,4 +1,14 @@
-.align 2
+#
+# p_delay.s: functions for waiting
+#
+# 2021 flabbergast@drak.xyz
+# Unlicense: https://unlicense.org/
+#
+.if compressed_isa
+.balign 2, 0
+.else
+.balign 4, 0
+.endif
 
 .include "platform_regs.inc"
 .equ MTIME_FREQUENCY, 33        # 32_768 Hz clock

03-clock/main.s

@@ -1,10 +1,12 @@
 #
+# main.s
 #
 # 2021 flabbergast <flabbergast@drak.xyz>
 # Unlicense: https://unlicense.org/
 # 
 
 .option norelax
+.equ compressed_isa, 1
 
 # -----------------------------------------------------------------------------
 # Code begins here

03-clock/p_clock.s

@@ -1,4 +1,16 @@
-.align 2
+#
+# p_clock.s: functions for setting up the main clock
+#
+# 2021 flabbergast@drak.xyz
+# Unlicense: https://unlicense.org/
+#
+
+
+.if compressed_isa
+.balign 2, 0
+.else
+.balign 4, 0
+.endif
 
 .include "platform_regs.inc"
 

03-clock/p_delay.s

@@ -1,4 +1,14 @@
-.align 2
+#
+# p_delay.s: functions for waiting
+#
+# 2021 flabbergast@drak.xyz
+# Unlicense: https://unlicense.org/
+#
+.if compressed_isa
+.balign 2, 0
+.else
+.balign 4, 0
+.endif
 
 .include "platform_regs.inc"
 .equ MTIME_FREQUENCY, 33        # 32_768 Hz clock

04-uart/main.s

@@ -1,10 +1,12 @@
 #
+# main.s
 #
 # 2021 flabbergast <flabbergast@drak.xyz>
 # Unlicense: https://unlicense.org/
 # 
 
 .option norelax
+.equ compressed_isa, 1
 
 # -----------------------------------------------------------------------------
 # Code begins here

04-uart/p_clock.s

@@ -1,4 +1,16 @@
-.align 2
+#
+# p_clock.s: functions for setting up the main clock
+#
+# 2021 flabbergast@drak.xyz
+# Unlicense: https://unlicense.org/
+#
+
+
+.if compressed_isa
+.balign 2, 0
+.else
+.balign 4, 0
+.endif
 
 .include "platform_regs.inc"
 

04-uart/p_delay.s

@@ -1,4 +1,14 @@
-.align 2
+#
+# p_delay.s: functions for waiting
+#
+# 2021 flabbergast@drak.xyz
+# Unlicense: https://unlicense.org/
+#
+.if compressed_isa
+.balign 2, 0
+.else
+.balign 4, 0
+.endif
 
 .include "platform_regs.inc"
 .equ MTIME_FREQUENCY, 33        # 32_768 Hz clock

04-uart/p_uart0.s

@@ -1,4 +1,14 @@
-.align 2
+#
+# p_uart0.s: basic uart0
+#
+# 2021 flabbergast@drak.xyz
+# Unlicense: https://unlicense.org/
+#
+.ifdef compressed_isa
+.balign 2, 0
+.else
+.balign 4, 0
+.endif
 
 .include "platform_regs.inc"
 

05-write/macros.s

@@ -1,6 +1,9 @@
 #
 # macros.s
 #
+# 2021 flabbergast <flabbergast@drak.xyz>
+# Unlicense: https://unlicense.org/
+# 
 
 # designate some RAM memory to a symbol
 .macro ramallot Name, Size
@@ -22,7 +25,7 @@
 .macro sized_string Text
    .byte 8f - 7f         # Compute length of string.
 7: .ascii "\Text"
-.ifdef compressed_isa
+.if compressed_isa
 8:  .balign 2, 0      # Realign
 .else
 8:  .balign 4, 0      # Realign

05-write/main.s

@@ -1,4 +1,5 @@
 #
+# main.s
 #
 # 2021 flabbergast <flabbergast@drak.xyz>
 # Unlicense: https://unlicense.org/

05-write/p_clock.s

@@ -1,4 +1,12 @@
-.ifdef compressed_isa
+#
+# p_clock.s: functions for setting up the main clock
+#
+# 2021 flabbergast@drak.xyz
+# Unlicense: https://unlicense.org/
+#
+
+
+.if compressed_isa
 .balign 2, 0
 .else
 .balign 4, 0

05-write/p_delay.s

@@ -1,4 +1,10 @@
-.ifdef compressed_isa
+#
+# p_delay.s: functions for waiting
+#
+# 2021 flabbergast@drak.xyz
+# Unlicense: https://unlicense.org/
+#
+.if compressed_isa
 .balign 2, 0
 .else
 .balign 4, 0

05-write/p_uart0.s

@@ -1,3 +1,9 @@
+#
+# p_uart0.s: basic uart0
+#
+# 2021 flabbergast@drak.xyz
+# Unlicense: https://unlicense.org/
+#
 .ifdef compressed_isa
 .balign 2, 0
 .else

05-write/write.s

@@ -1,6 +1,9 @@
 #
 # write.s: printing strings
 #
+# 2021 flabbergast@drak.xyz
+# Unlicense: https://unlicense.org/
+#
 # assumes: stack macros, ramallot macro, uart_emit symbol
 # if 'fixed_emit'==0, assumes that an address for "emit" is
 #  at 'write_emit_routine_p'
@@ -11,7 +14,7 @@
 # we use the stack/memory here - the expectation is that
 #   "emit" is 'slow' anyway, so don't worry about speed
 # can use up to 48 bytes on return stack (temporarily of course)
-
+#
 .if compressed_isa
 .balign 2, 0
 .else

06-irq-delay/macros.s

@@ -1,6 +1,9 @@
 #
 # macros.s
 #
+# 2021 flabbergast <flabbergast@drak.xyz>
+# Unlicense: https://unlicense.org/
+# 
 
 # designate some RAM memory to a symbol
 .macro ramallot Name, Size

06-irq-delay/main.s

@@ -1,4 +1,5 @@
 #
+# main.s
 #
 # 2021 flabbergast <flabbergast@drak.xyz>
 # Unlicense: https://unlicense.org/

06-irq-delay/p_clock.s

@@ -1,3 +1,11 @@
+#
+# p_clock.s: functions for setting up the main clock
+#
+# 2021 flabbergast@drak.xyz
+# Unlicense: https://unlicense.org/
+#
+
+
 .if compressed_isa
 .balign 2, 0
 .else

06-irq-delay/p_delay.s

@@ -1,3 +1,9 @@
+#
+# p_delay.s: functions for waiting
+#
+# 2021 flabbergast@drak.xyz
+# Unlicense: https://unlicense.org/
+#
 .if compressed_isa
 .balign 2, 0
 .else

06-irq-delay/p_interrupts.s

@@ -1,6 +1,9 @@
 #
 # interrupts.s: basic irq handling setup
 #
+# 2021 flabbergast@drak.xyz
+# Unlicense: https://unlicense.org/
+#
 # ! when you edit the irq handler, don't forget to push/pop
 #   any extra registers that you use !
 # - we don't use the vectored interrupt handling, so
@@ -12,6 +15,13 @@
 # (SiFive FE310 only has 3 interrupt sources (sw, timer, plic),
 #  so any vector table would only have 3 "used" entries.)
 #
+.if compressed_isa
+.balign 2, 0
+.else
+.balign 4, 0
+.endif
+
+.include "platform_regs.inc"
 
 irq_handler:
   addi sp, sp, 3*(-4)

06-irq-delay/p_uart0.s

@@ -1,4 +1,10 @@
-.if compressed_isa
+#
+# p_uart0.s: basic uart0
+#
+# 2021 flabbergast@drak.xyz
+# Unlicense: https://unlicense.org/
+#
+.ifdef compressed_isa
 .balign 2, 0
 .else
 .balign 4, 0

06-irq-delay/write.s

@@ -1,6 +1,9 @@
 #
 # write.s: printing strings
 #
+# 2021 flabbergast@drak.xyz
+# Unlicense: https://unlicense.org/
+#
 # assumes: stack macros, ramallot macro, uart_emit symbol
 # if 'fixed_emit'==0, assumes that an address for "emit" is
 #  at 'write_emit_routine_p'
@@ -11,7 +14,7 @@
 # we use the stack/memory here - the expectation is that
 #   "emit" is 'slow' anyway, so don't worry about speed
 # can use up to 48 bytes on return stack (temporarily of course)
-
+#
 .if compressed_isa
 .balign 2, 0
 .else

07-uart0irq/macros.s

@@ -1,6 +1,8 @@
 #
 # macros.s
 #
+# 2021 flabbergast@drak.xyz
+#
 
 # designate some RAM memory to a symbol
 .macro ramallot Name, Size

07-uart0irq/main.s

@@ -1,4 +1,5 @@
 #
+# main.s
 #
 # 2021 flabbergast <flabbergast@drak.xyz>
 # Unlicense: https://unlicense.org/

07-uart0irq/p_clock.s

@@ -1,3 +1,11 @@
+#
+# p_clock.s: functions for setting up the main clock
+#
+# 2021 flabbergast@drak.xyz
+# Unlicense: https://unlicense.org/
+#
+
+
 .if compressed_isa
 .balign 2, 0
 .else

07-uart0irq/p_delay.s

@@ -1,3 +1,9 @@
+#
+# p_delay.s: functions for waiting
+#
+# 2021 flabbergast@drak.xyz
+# Unlicense: https://unlicense.org/
+#
 .if compressed_isa
 .balign 2, 0
 .else

07-uart0irq/p_interrupts.s

@@ -1,6 +1,9 @@
 #
 # interrupts.s: basic irq handling setup
 #
+# 2021 flabbergast@drak.xyz
+# Unlicense: https://unlicense.org/
+#
 # ! when you edit the irq handler, don't forget to push/pop
 #   any extra registers that you use !
 # - we don't use the vectored interrupt handling, so
@@ -12,6 +15,13 @@
 # (SiFive FE310 only has 3 interrupt sources (sw, timer, plic),
 #  so any vector table would only have 3 "used" entries.)
 #
+.if compressed_isa
+.balign 2, 0
+.else
+.balign 4, 0
+.endif
+
+.include "platform_regs.inc"
 
 irq_handler:
   addi sp, sp, 9*(-4)

07-uart0irq/p_uart0irq.s

@@ -2,10 +2,11 @@
 # p_uart0irq.s: Buffered interrupt-driven UART driver
 #
 # 2021 flabbergast@drak.xyz
+# Unlicense: https://unlicense.org/
 #
 # UART0: RX:pin16 TX:pin17
 # This interrupt-driven version requires a few things at other places:
-#  - two irq_handler_ functions here plugged properly into the
+#  - the irq_handler_ function here plugged properly into the
 #    interrupt system (in p_interrupts.s)
 #  - and of course enabled interrupts for operation
 #

07-uart0irq/write.s

@@ -1,6 +1,9 @@
 #
 # write.s: printing strings
 #
+# 2021 flabbergast@drak.xyz
+# Unlicense: https://unlicense.org/
+#
 # assumes: stack macros, ramallot macro, uart_emit symbol
 # if 'fixed_emit'==0, assumes that an address for "emit" is
 #  at 'write_emit_routine_p'
@@ -11,7 +14,7 @@
 # we use the stack/memory here - the expectation is that
 #   "emit" is 'slow' anyway, so don't worry about speed
 # can use up to 48 bytes on return stack (temporarily of course)
-
+#
 .if compressed_isa
 .balign 2, 0
 .else

memmap

@@ -1,3 +1,14 @@
+/*
+  memmap: the linker file
+
+  2021 flabbergast@drak.xyz
+  Unlicense: https://unlicense.org/
+
+  - the flash start is at 20010000, the default
+    for the bootloader of HiFive1B and Sparkfun
+    Red-V Thing Plus
+  
+*/
 
 MEMORY
 {

platform_regs.inc

@@ -1,3 +1,9 @@
+#
+# platform_regs.inc: FE310-G002 registers as ASM constants
+#
+# 2021 flabbergast@drak.xyz
+# Unlicense: https://unlicense.org/
+#
 .equ GPIO_BASE,       0x10012000
 .equ GPIO_INPUT_VAL,  0x00
 .equ GPIO_INPUT_EN,   0x04